The present invention relates generally to decoder circuits, and more particularly to a decoder circuit effective upon use in word line selection within a semiconductor memory device.
In conventional decoder circuits, a so-called multi-emitter type decoder circuit, for example, has a resistor connected to the base of the word driver (transistor). Hence, when a load capacitance of a line that is connected to the emitter of this word driver is large like that of a word line, a large current must be passed through the base of the word driver through the above resistor upon selection of the word line connected to this word driver, because a large charging current must be supplied to the word line being selected. When the large charging current is flowing, the level of the base voltage of the word driver connected to the selected word line becomes high.
However, because the resistance of the above resistor is large and the load capacitance is present, a long time constant is created by the load capacitance, slowing down the rising characteristic of the base voltage of the above word driver.
One method of improving the rising characteristic of the above base voltage is to reduce the resistance of the above resistor, however, this will result in increased power consumption. Another method of sharpening the rise in the rising characteristic of the above base voltage is to reduce the word line capacitance, but, of course, the word line capacitance cannot be reduced arbitrarily.